[PATCH] D67104: GlobalISel/TableGen: Fix handling of EXTRACT_SUBREG constraints

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: dsanders, paquette, aemerson, aditya_nandakumar.
Herald added subscribers: Petar.Avramovic, javed.absar, rovka, wdng.

This was only using the correct register constraints if this was the
final result instruction. If the extract was a sub instruction of the
result, it would attempt to use GIR_ConstrainSelectedInstOperands on a
COPY, which won't work. Move the handling to
createAndImportSubInstructionRenderer so it works correctly.

      

I don't fully understand why runOnPattern and
createAndImportSubInstructionRenderer both need to handle these
special cases, and constrain them with slightly different methods. If
I remove the runOnPattern handling, it does break the constraint when
the final result instruction is EXTRACT_SUBREG.


https://reviews.llvm.org/D67104

Files:
  test/CodeGen/AArch64/GlobalISel/select-stlxr-intrin.mir
  test/CodeGen/AArch64/GlobalISel/select-stx.mir
  test/TableGen/GlobalISelEmitterRegSequence.td
  test/TableGen/GlobalISelEmitterSubreg.td
  utils/TableGen/GlobalISelEmitter.cpp

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