[PATCH] D65683: MVT: Add v3i16/v3f16 vectors

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: test/CodeGen/X86/promote-vec3.ll:1
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=SSE3
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Can you explain why the X86 tests changed?


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Comment at: utils/TableGen/IntrinsicEmitter.cpp:224
+  IIT_VEC_ELEMENT = 42,
+  IIT_V48  = 43
 };
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Is this needed for this patch or a future patch that adds an intrinsic?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D65683/new/

https://reviews.llvm.org/D65683