[PATCH] D63924: [AMDGPU] Created a sub-register class for the return address operand in the return instruction.

Christudasan Devadasan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 28 03:33:33 PDT 2019

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cdevadas added a comment.

Hi Matt,

The codegen is different now and the scheduler & RA introduce most changes in the test cases.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63924/new/

https://reviews.llvm.org/D63924

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