[PATCH] D63411: [RISCV] Specify registers used in DWARF exception handling

[Luís Marques via Phabricator via llvm-commits]

luismarques added a comment.

In D63411#1551719 <https://reviews.llvm.org/D63411#1551719>, @asb wrote:

> Thanks for the patch! Do you have a reference for these being the appropriate values?


I had an old patch that also implemented this and the registers match this patch. It's been over an year so I'm no longer sure where I dug up the information (maybe binutils), but the fact that it matches is good evidence that this is correct, although it would be nice leaving a source here in the review for future reference.


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