[PATCH] D63411: [RISCV] Specify registers used in DWARF exception handling

[Edward Jones via Phabricator via llvm-commits]

edward-jones added a comment.

In D63411#1551719 <https://reviews.llvm.org/D63411#1551719>, @asb wrote:

> Thanks for the patch! Do you have a reference for these being the appropriate values?


I based these values on what the GCC tool chain appears to do, but now after searching around I can't find any documentation saying what the correct values should be. I had assumed that this would be written in the ABI documentation (https://github.com/riscv/riscv-elf-psabi-doc (?)) but I can't see any mention there.


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