[PATCH] D60459: SILoadStoreOptimizer pass mischedules s_add,s_addc with interfering s_lshl

[Ron Lieberman via Phabricator via llvm-commits]

ronlieb marked an inline comment as done.
ronlieb added inline comments.


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Comment at: test/CodeGen/AMDGPU/scc-missing-add.mir:1
+# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass=si-load-store-opt -o - %s | FileCheck -check-prefix=GFX9 %s
+# RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -run-pass=si-load-store-opt -o - %s | FileCheck -check-prefix=GFX9 %s
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rampitec wrote:
> You can combine both mir tests into a single file and significantly reduce them. For example you do not need all of the IR.
after playing with trying to reduce the IR, I don't really think I can.
This particular pass seems sensitive to PC relative references within the MIR that are defined within the IR, and other symbol references as well. 

It sort of falls into this  category as described in the MIR documentation:

MIR code contains a whole IR module. This is necessary because there are no equivalents in MIR for global variables, references to external functions, function attributes, metadata, debug info. Instead some MIR data references the IR constructs. You can often remove them if the test doesn’t depend on them.

And the above really complicates trying to merge the two tests into one.


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  https://reviews.llvm.org/D60459/new/

https://reviews.llvm.org/D60459