[PATCH] D60459: SILoadStoreOptimizer pass mischedules s_add,s_addc with interfering s_lshl

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:271
+  I++;
+  for (int i = 0; I != E && i < SearchLimit; ++I, i++)
+    if (I->definesRegister(AMDGPU::SCC))
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Having i and I variables in the same statement is quite misleading.


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Comment at: test/CodeGen/AMDGPU/scc-missing-add.mir:1
+# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass=si-load-store-opt -o - %s | FileCheck -check-prefix=GFX9 %s
+# RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -run-pass=si-load-store-opt -o - %s | FileCheck -check-prefix=GFX9 %s
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You can combine both mir tests into a single file and significantly reduce them. For example you do not need all of the IR.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60459/new/

https://reviews.llvm.org/D60459