[PATCH] D60546: [X86] Use MOVQ for i64 non-seq_cst atomic_stores when SSE2 is enabled

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 194635.
craig.topper added a comment.

Update a another test I missed previously


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60546/new/

https://reviews.llvm.org/D60546

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/lib/Target/X86/X86InstrAVX512.td
  llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/test/CodeGen/X86/atomic-fp.ll
  llvm/test/CodeGen/X86/atomic-non-integer.ll
  llvm/test/CodeGen/X86/atomic6432.ll

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