[PATCH] D60459: SILoadStoreOptimizer pass mischedules s_add,s_addc with interfering s_lshl

[Ron Lieberman via Phabricator via llvm-commits]

ronlieb updated this revision to Diff 194514.
ronlieb added a comment.

added two MIR tests,and refined logic to properly bail.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60459/new/

https://reviews.llvm.org/D60459

Files:
  lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  test/CodeGen/AMDGPU/scc-add-lshl-addc.ll
  test/CodeGen/AMDGPU/scc-has-add.mir
  test/CodeGen/AMDGPU/scc-missing-add.mir

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