[PATCH] D60358: [TargetLowering][X86][AArch64] Teach SimplifyDemandedBits to use ShrinkDemandedOp on ISD::SHL nodes.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 194374.
craig.topper added a comment.

Remove the AArch64 code change. Show the regression instead. I'll work on the separate patch and rebase accordingly depending on what order they get committed


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60358/new/

https://reviews.llvm.org/D60358

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/tbz-tbnz.ll
  llvm/test/CodeGen/X86/btc_bts_btr.ll
  llvm/test/CodeGen/X86/narrow-shl-cst.ll
  llvm/test/CodeGen/X86/scheduler-backtracking.ll
  llvm/test/CodeGen/X86/zext-logicop-shift-load.ll

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