[PATCH] D59758: [DAGCombiner] Combine OR as ADD when no common bits are set
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 2 06:22:51 PDT 2019
spatel added a comment.
Thanks for expanding on the x86 example. I agree now that it's a good idea to try these optimizations.
@RKSimon may know from looking, but this might mean we can remove the more specific fold from rL357351 <https://reviews.llvm.org/rL357351> ?
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D59758/new/
https://reviews.llvm.org/D59758
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