[PATCH] D59422: [SelectionDAG] Use SimplifyDemandedBits on truncated SCALAR_TO_VECTORs

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 15 10:24:32 PDT 2019


RKSimon created this revision.
RKSimon added reviewers: craig.topper, efriedma, t.p.northover.
Herald added subscribers: kristof.beyls, javed.absar.
Herald added a project: LLVM.

Definite win on AVX512 as it allows us to avoid some gpr2mask transfers when a rematerializable 'allones' constant could be used.

I don't think the aarch64 fmov -> dup change is a regression, but would like confirmation if possible.


Repository:
  rL LLVM

https://reviews.llvm.org/D59422

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/AArch64/arm64-build-vector.ll
  test/CodeGen/X86/avx512-mask-op.ll


Index: test/CodeGen/X86/avx512-mask-op.ll
===================================================================
--- test/CodeGen/X86/avx512-mask-op.ll
+++ test/CodeGen/X86/avx512-mask-op.ll
@@ -1069,10 +1069,9 @@
 ; KNL-NEXT:    kmovw %ecx, %k1
 ; KNL-NEXT:    kmovw %eax, %k2
 ; KNL-NEXT:    kmovw %edi, %k3
-; KNL-NEXT:    movb $1, %al
-; KNL-NEXT:    kmovw %eax, %k4
-; KNL-NEXT:    kshiftrw $5, %k0, %k5
-; KNL-NEXT:    kxorw %k4, %k5, %k4
+; KNL-NEXT:    kshiftrw $5, %k0, %k4
+; KNL-NEXT:    kxnorw %k0, %k0, %k5
+; KNL-NEXT:    kxorw %k5, %k4, %k4
 ; KNL-NEXT:    kshiftlw $15, %k4, %k4
 ; KNL-NEXT:    kshiftrw $10, %k4, %k4
 ; KNL-NEXT:    kxorw %k4, %k0, %k4
@@ -1091,8 +1090,7 @@
 ; SKX-LABEL: test16:
 ; SKX:       ## %bb.0:
 ; SKX-NEXT:    kmovq %rdi, %k0
-; SKX-NEXT:    movb $1, %al
-; SKX-NEXT:    kmovd %eax, %k1
+; SKX-NEXT:    kxnorw %k0, %k0, %k1
 ; SKX-NEXT:    kshiftrq $5, %k0, %k2
 ; SKX-NEXT:    kxorq %k1, %k2, %k1
 ; SKX-NEXT:    kshiftlq $63, %k1, %k1
@@ -1104,8 +1102,7 @@
 ; AVX512BW-LABEL: test16:
 ; AVX512BW:       ## %bb.0:
 ; AVX512BW-NEXT:    kmovq %rdi, %k0
-; AVX512BW-NEXT:    movb $1, %al
-; AVX512BW-NEXT:    kmovd %eax, %k1
+; AVX512BW-NEXT:    kxnorw %k0, %k0, %k1
 ; AVX512BW-NEXT:    kshiftrq $5, %k0, %k2
 ; AVX512BW-NEXT:    kxorq %k1, %k2, %k1
 ; AVX512BW-NEXT:    kshiftlq $63, %k1, %k1
@@ -1125,10 +1122,9 @@
 ; AVX512DQ-NEXT:    kmovw %ecx, %k1
 ; AVX512DQ-NEXT:    kmovw %eax, %k2
 ; AVX512DQ-NEXT:    kmovw %edi, %k3
-; AVX512DQ-NEXT:    movb $1, %al
-; AVX512DQ-NEXT:    kmovw %eax, %k4
-; AVX512DQ-NEXT:    kshiftrw $5, %k0, %k5
-; AVX512DQ-NEXT:    kxorw %k4, %k5, %k4
+; AVX512DQ-NEXT:    kshiftrw $5, %k0, %k4
+; AVX512DQ-NEXT:    kxnorw %k0, %k0, %k5
+; AVX512DQ-NEXT:    kxorw %k5, %k4, %k4
 ; AVX512DQ-NEXT:    kshiftlw $15, %k4, %k4
 ; AVX512DQ-NEXT:    kshiftrw $10, %k4, %k4
 ; AVX512DQ-NEXT:    kxorw %k4, %k0, %k0
@@ -1147,10 +1143,9 @@
 ; X86-LABEL: test16:
 ; X86:       ## %bb.0:
 ; X86-NEXT:    kmovq {{[0-9]+}}(%esp), %k0
-; X86-NEXT:    movb $1, %al
-; X86-NEXT:    kmovd %eax, %k1
-; X86-NEXT:    kshiftrq $5, %k0, %k2
-; X86-NEXT:    kxorq %k1, %k2, %k1
+; X86-NEXT:    kshiftrq $5, %k0, %k1
+; X86-NEXT:    kxnorw %k0, %k0, %k2
+; X86-NEXT:    kxorq %k2, %k1, %k1
 ; X86-NEXT:    kshiftlq $63, %k1, %k1
 ; X86-NEXT:    kshiftrq $58, %k1, %k1
 ; X86-NEXT:    kxorq %k1, %k0, %k0
Index: test/CodeGen/AArch64/arm64-build-vector.ll
===================================================================
--- test/CodeGen/AArch64/arm64-build-vector.ll
+++ test/CodeGen/AArch64/arm64-build-vector.ll
@@ -25,7 +25,7 @@
 ; CHECK-LABEL: build_all_zero:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    mov w8, #44672
-; CHECK-NEXT:    fmov s1, w8
+; CHECK-NEXT:    dup.8h v1, w8
 ; CHECK-NEXT:    mul.8h v0, v0, v1
 ; CHECK-NEXT:    ret
   %b = add <8 x i16> %a, <i16 -32768, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>
Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -18253,6 +18253,11 @@
     }
   }
 
+  // If we have implicit truncation, attempt to simplify InVal.
+  if (InVal.getScalarValueSizeInBits() > VT.getScalarSizeInBits())
+    if (SimplifyDemandedBits(SDValue(N, 0)))
+      return SDValue(N, 0);
+
   return SDValue();
 }
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D59422.190847.patch
Type: text/x-patch
Size: 3465 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190315/8384add3/attachment.bin>


More information about the llvm-commits mailing list