[PATCH] D58066: [MCA][Scheduler] Use latency information to further classify busy instructions.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: include/llvm/MCA/HardwareUnits/Scheduler.h:98
   std::vector<InstRef> ReadySet;
   std::vector<InstRef> IssuedSet;
 
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If possible it'd be useful to comment these sets and explain their relationship to the Instruction::InstrStage enum values


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  https://reviews.llvm.org/D58066/new/

https://reviews.llvm.org/D58066