[PATCH] D57054: [MachineOutliner][ARM][RFC] Add Machine Outliner support for ARM
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 28 09:21:19 PST 2019
dmgreen added a comment.
The only increase I was seeing was because of D57254 <https://reviews.llvm.org/D57254> (and perhaps the alignment thing you mention, but that was very small/rare, iirc). The main part was definitely the exception handlers pulling in a big chunk more code. The other results were looking great.
================
Comment at: lib/Target/ARM/ARMBaseInstrInfo.cpp:5431
+ unsigned AddrMode = (MI->getDesc().TSFlags & ARMII::AddrModeMask);
+ int Idx = MI->findRegisterUseOperandIdx(ARM::SP) + 1;
+ int64_t Offset = 0;
----------------
yroux wrote:
> dmgreen wrote:
> > What if we are actually storing sp? As in something like,
> > t2STRi8 $sp, $r7, 12, ...
> hmm, there might be an issue if the stored value (with a fix-up) is used after the outlined code indeed, I think that this kind of issue didn't occurred in my tests because of the constraints made at lines 5645-5697, I'll try to exhibit the issue with an mir test.
I think it was also trying to access operand Idx (= 1) as an Imm, not a Reg, which is what made me spot it. I can probably get a reproducer, if it would be useful.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D57054/new/
https://reviews.llvm.org/D57054
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