[PATCH] D55870: [X86] Don't match TESTrr from (cmp (and X, Y), 0) during isel. Defer to post processing

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb added inline comments.


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Comment at: test/CodeGen/X86/bmi.ll:880-882
 ; X64-NEXT:    movl %esi, %eax
-; X64-NEXT:    # kill: def $edi killed $edi def $rdi
-; X64-NEXT:    leal -1(%rdi), %ecx
-; X64-NEXT:    testl %edi, %ecx
+; X64-NEXT:    blsrl %edi, %ecx
 ; X64-NEXT:    cmovnel %edx, %eax
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craig.topper wrote:
> andreadb wrote:
> > Same.
> > Could be a simple `test+cmov`. But - again - I take that the purpose of this test is not to check if we are smart enough to fold away that sequence...
> How could this be a TEST+CMOV? ZF will be set if the input is zero or has exactly one bit set.
Ouch.. right. We are not extracting a bit here. We are resetting the lowest set bit here. So TEST+CMOV is not fine. I misread the code.


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  https://reviews.llvm.org/D55870/new/

https://reviews.llvm.org/D55870