[PATCH] D55870: [X86] Don't match TESTrr from (cmp (and X, Y), 0) during isel. Defer to post processing
Andrea Di Biagio via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 19 09:22:06 PST 2018
andreadb added inline comments.
================
Comment at: test/CodeGen/X86/bmi.ll:624-635
; X64-LABEL: blsi64_z2:
; X64: # %bb.0:
; X64-NEXT: movq %rsi, %rax
-; X64-NEXT: movq %rdi, %rcx
-; X64-NEXT: negq %rcx
-; X64-NEXT: testq %rdi, %rcx
+; X64-NEXT: blsiq %rdi, %rcx
; X64-NEXT: cmovneq %rdx, %rax
; X64-NEXT: retq
%t0 = sub i64 0, %a
----------------
andreadb wrote:
> craig.topper wrote:
> > craig.topper wrote:
> > > andreadb wrote:
> > > > Again. Here we may prefer POPCNT to BLSI. It tends to have better latency/throughput overall. I think it is worthy to raise a bug for this.
> > > >
> > > > Speaking about these tests in general:
> > > > I think that we should make these more robust (maybe in a separate patch).
> > > >
> > > > We can probably make this test more robust by changing how we check the result. For example, rather than comparing against zero, we can compare against a specific power-of-2. That would force the selection of BLSI, since we would need to know the position of that bit.
> > > >
> > > > We can probably do something similar to improve the other test.
> > > I thought we just established that BLSI could be replaced with a compare of the input with 0. Why would we replace it with POPCNT?
> > Doesn't BLSI have better throughput than POPCNT on Intel CPUs? BLSI is on 2 ports. POPCNT is only one port.
> Right, forget about that comment.
> A simple compare of the input is better for this case.
Interesting. On AMD family 16h and 17h, POPCNT and BLSI use the same ALU pipes. However BLSI is 2 uops, versus 1 uop for the POPCNT. So, the throughput of BLSI is half the throughput of POPCNT.
That being said, we already agreed that ideally, a simple compare of the input would have been better.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D55870/new/
https://reviews.llvm.org/D55870
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