[PATCH] D55870: [X86] Don't match TESTrr from (cmp (and X, Y), 0) during isel. Defer to post processing
Andrea Di Biagio via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 19 08:51:04 PST 2018
andreadb added inline comments.
================
Comment at: test/CodeGen/X86/bmi.ll:531-539
; X64-NEXT: movl %esi, %eax
-; X64-NEXT: movl %edi, %ecx
-; X64-NEXT: negl %ecx
-; X64-NEXT: testl %edi, %ecx
+; X64-NEXT: blsil %edi, %ecx
; X64-NEXT: cmovnel %edx, %eax
; X64-NEXT: retq
%t0 = sub i32 0, %a
%t1 = and i32 %t0, %a
%t2 = icmp eq i32 %t1, 0
----------------
craig.topper wrote:
> andreadb wrote:
> > This is a strange/interesting test.
> >
> > If %a is zero, then %t1 is also zero.
> > If %a is not zero, then %t1 has exactly one bit set.
> >
> > -->
> >
> > Testing if %t1 is equal to 0, is equivalent to testing if %a is 0.
> >
> > The only case where %t2 is TRUE, is if %a is 0.
> > This whole logic could be folded into a icmp + select. So we don't even need to select a BLSI.
> >
> > This sequence should be optimized at IR level. I didn't test if it is what happens.
> >
> > That being said. I take that the the purpose of this test was different. Probably, this test should be rewritten in a way that doesn't expose that simplification?
> >
> The tests were intended to test use the Z flag from the BMI instructions.
I see.
In that case, then don't worry about changing those tests.
I think it is still worthy to raise a bug about teaching how to fold that computation at IR level. We keep these tests to verify that the Z flag is actually used.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D55870/new/
https://reviews.llvm.org/D55870
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