[PATCH] D54042: [AMDGPU] Extend the SI Load/Store optimizer to combine more things.

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle added a comment.

The huge switch statements are a poster child for the generic SearchableTables, somewhat analogous to what already exists for MIMGInstructions. Sketching it out:

  class LoadStoreBaseOpcode {
    LoadStoreBaseOpcode BaseOpcode = !cast<LoadStoreBaseOpcode>(NAME);
    bit Srsrc;
    bit Sbase;
    ...
  }
  
  def LoadStoreBaseOpcode : GenericEnum {
    let FilterClass = "LoadStoreBaseOpcode";
  }
  
  class LoadStoreOpcode {
    Instruction Opcode;
    LoadStoreBaseOpcode BaseOpcode;
    bits<8> Width;
  }
  
  def LoadStoreOpcodeTable : GenericTable {
    let FilterClass = "LoadStoreOpcode";
    let CppTypeName = "LoadStoreOpcode";
    let Fields = ["Opcode", "BaseOpcode", "Width"];
    GenericEnum TypeOf_BaseOpcode = LoadStoreBaseOpcode;
  
    let PrimaryKey = ["BaseOpcode", "Width"];
    let PrimaryKeyName = "getLoadStoreOpcode";
  } 
  
  ... and so on ...

Not a complete review yet, but I need to sign off.



================
Comment at: lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:79
+enum InstClassEnum {
+  UNKNOWN,
+  DS_READ,
----------------
Why is this needed?


================
Comment at: lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:83
+  S_BUFFER_LOAD_IMM,
+  BUFFER_LOAD_IDXEN,
+  BUFFER_LOAD_OFFEN,
----------------
Do those actually occur like this in practice?


https://reviews.llvm.org/D54042