[PATCH] D52980: [X86][AVX1] Enable *_EXTEND_VECTOR_INREG lowering of 256-bit vectors

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: test/CodeGen/X86/avg.ll:2399
+; AVX1-NEXT:    addq $16, %rsp
 ; AVX1-NEXT:    popq %rbx
 ; AVX1-NEXT:    popq %r12
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craig.topper wrote:
> Is this an increase in code?
Yes, I enabled AVX1 reuse of SIGN_EXTEND/ZERO_EXTEND 128->256 extensions the same as AVX2 but the codegen falls over more than would be good. I'll remove it for now but this does mean we miss some of the improvements.


Repository:
  rL LLVM

https://reviews.llvm.org/D52980