[PATCH] D52980: [X86][AVX1] Enable *_EXTEND_VECTOR_INREG lowering of 256-bit vectors

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: test/CodeGen/X86/avg.ll:2399
+; AVX1-NEXT:    addq $16, %rsp
 ; AVX1-NEXT:    popq %rbx
 ; AVX1-NEXT:    popq %r12
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Is this an increase in code?


Repository:
  rL LLVM

https://reviews.llvm.org/D52980