[PATCH] D48580: [AArch64] Support reserving x1-7 registers.

[Tri Vo via Phabricator via llvm-commits]

trong updated this revision to Diff 164099.
trong marked 2 inline comments as done.

https://reviews.llvm.org/D48580

Files:
  lib/Target/AArch64/AArch64.td
  lib/Target/AArch64/AArch64CallLowering.cpp
  lib/Target/AArch64/AArch64FastISel.cpp
  lib/Target/AArch64/AArch64FrameLowering.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/AArch64/AArch64RegisterInfo.cpp
  lib/Target/AArch64/AArch64RegisterInfo.h
  lib/Target/AArch64/AArch64Subtarget.cpp
  lib/Target/AArch64/AArch64Subtarget.h
  test/CodeGen/AArch64/arm64-platform-reg.ll

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