[PATCH] D48580: [AArch64] Support reserving x1-7 registers.
Nick Desaulniers via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 5 11:09:29 PDT 2018
nickdesaulniers added inline comments.
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Comment at: lib/Target/AArch64/AArch64RegisterInfo.cpp:173
+ AArch64::X6, AArch64::X7 };
+ return std::any_of(std::begin(GPRArgRegs), std::end(GPRArgRegs),
+ [this, &MF](MCPhysReg r){return isReservedReg(MF, r);});
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consider using const iterators (`cbegin`, `cend`) if you're not modifying the iterated value.
================
Comment at: lib/Target/AArch64/AArch64Subtarget.h:230
+ bool isXRegisterReserved(size_t i) const { return ReserveXRegister[i]; }
+ bool getNumXRegisterReserved() const { return ReserveXRegister.count(); }
bool hasFPARMv8() const { return HasFPARMv8; }
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return type `bool`?
https://reviews.llvm.org/D48580
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