[PATCH] D50781: [X86][SSE] Lower constant vXi8 ISD::SRL/ISD::SRA using PMULLW
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 15 10:52:50 PDT 2018
craig.topper added inline comments.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:23701
+ (VT == MVT::v16i8 || (VT == MVT::v32i8 && Subtarget.hasInt256()) ||
+ (VT == MVT::v64i8 && Subtarget.hasBWI())) &&
+ !Subtarget.hasXOP()) {
----------------
hasBWI is unnecessary here right? BWI is only truly legal under useBWIRegs not hasBWI. But if you have a v64i8 type here, it must already be legal.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:23715
+
+ if (VT == MVT::v16i8 && Subtarget.hasInt256()) {
+ R = Opc == ISD::SRA ? DAG.getSExtOrTrunc(R, dl, ExVT)
----------------
Can we do this for v32i8 and useBWIRegs?
Repository:
rL LLVM
https://reviews.llvm.org/D50781
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