[PATCH] D50781: [X86][SSE] Lower constant vXi8 ISD::SRL/ISD::SRA using PMULLW

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:23701
+      (VT == MVT::v16i8 || (VT == MVT::v32i8 && Subtarget.hasInt256()) ||
+       (VT == MVT::v64i8 && Subtarget.hasBWI())) &&
+      !Subtarget.hasXOP()) {
----------------
craig.topper wrote:
> hasBWI is unnecessary here right? BWI is only truly legal under useBWIRegs not hasBWI. But if you have a v64i8 type here, it must already be legal.
Yup - I can simplify that cheers!


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:23715
+
+    if (VT == MVT::v16i8 && Subtarget.hasInt256()) {
+      R = Opc == ISD::SRA ? DAG.getSExtOrTrunc(R, dl, ExVT)
----------------
craig.topper wrote:
> Can we do this for v32i8 and useBWIRegs?
Its caught in code above it (line 32684).


Repository:
  rL LLVM

https://reviews.llvm.org/D50781