[PATCH] D50781: [X86][SSE] Lower constant vXi8 ISD::SRL/ISD::SRA using PMULLW

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: efriedma, craig.topper, spatel, lebedev.ri, andreadb.

Extending the concept introduced in https://reviews.llvm.org/D49562, this patch lowers constant vXi8 ISD::SRL/ISD::SRA by zero/sign extending to vXi16 and using PMULLW and then truncating the high 8 bits of the result.


Repository:
  rL LLVM

https://reviews.llvm.org/D50781

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/combine-sdiv.ll
  test/CodeGen/X86/vector-rotate-512.ll
  test/CodeGen/X86/vector-shift-ashr-128.ll
  test/CodeGen/X86/vector-shift-ashr-256.ll
  test/CodeGen/X86/vector-shift-ashr-512.ll
  test/CodeGen/X86/vector-shift-lshr-128.ll
  test/CodeGen/X86/vector-shift-lshr-256.ll
  test/CodeGen/X86/vector-shift-lshr-512.ll

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