[PATCH] D50222: [CodeGen] [SelectionDAG] More efficient code for X % C == 0

[David Majnemer via Phabricator via llvm-commits]

majnemer added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:3632-3639
+  // N % D == 0 <=> N % |D| == 0
+  if (D.isNegative()) {
+    D.negate();
+  }
+
+  // Rewrite D = D0 * 2^K
+  unsigned K = D.countTrailingZeros();
----------------
The sign bit may be set for APInts fed into URem operations: all isNegative does is check that the MSB is set. I don't think it is OK to branch on the sign bit here without considering if we are in dealing with URem or SRem. I think what you want is:
  if (IsSigned) {
    D0 = D.ashr(K);
  } else {
    D0 = D.lshr(K);
  }


Repository:
  rL LLVM

https://reviews.llvm.org/D50222