[PATCH] D49574: [CodeGen] Fix ICE in SelectionDAG::computeKnownBits

[Scott Linder via Phabricator via llvm-commits]

scott.linder updated this revision to Diff 157104.
scott.linder added a comment.
Herald added a subscriber: mgorny.

I have updated the lit test with update_llc_test_checks, updated the condition in TargetLowering to allow for the case where DemandedElts is already wide enough, and added unittests for the cases which trigger the ICE in each function. This is still dependent on my assumptions about the exact semantics of EXTRACT_SUBVECTOR being correct.


https://reviews.llvm.org/D49574

Files:
  lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  lib/CodeGen/SelectionDAG/TargetLowering.cpp
  test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
  unittests/CodeGen/CMakeLists.txt
  unittests/CodeGen/SelectionDAGTest.cpp

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