[PATCH] D48580: [AArch64] Support reserving x1-7 registers.

[Kristof Beyls via Phabricator via llvm-commits]

kristof.beyls added a comment.

I believe this is aiming to implement the -ffixed-//reg// command line option from gcc.
The documentation is at https://gcc.gnu.org/onlinedocs/gcc/Code-Gen-Options.html:

> -ffixed-reg
>  Treat the register named reg as a fixed register; generated code should never refer to it (except perhaps as a stack pointer, frame pointer or in some other fixed role).
> 
> reg must be the name of a register. The register names accepted are machine-specific and are defined in the REGISTER_NAMES macro in the machine description macro file.
> 
> This flag does not have a negative form, because it specifies a three-way choice.

A few thoughts:

1. From the documentation and a few related StackOverflow questions I get the impression that in the gcc implementation, the programmer is supposed to understand what he's doing when using this option. Not sure if gcc provides any error messages or in exactly which circumstances it will error. My hand wavy feel is that it'd be nice to at least warn when something seems incorrect - but given this is a command line option that seems to be used by "users who know best", the compiler giving an error may prevent the user from doing something he understands and needs to be done and cannot be achieved in any other way?

2. It seems this command line option was discussed years ago too: http://lists.llvm.org/pipermail/llvm-dev/2012-October/054033.html. I think Chris's point about LTO compilation may be especially relevant. Shouldn't this be implemented as a function attribute to make sure this won't break in LTO builds?

3. I assume we'll end up supporting this feature for multiple/all targets. A target-independent way to support this would be nice. My guess is that incrementally introducing this with only AArch64 support to start with would be fine, as long as there is an idea of what the path forward is to make this feature available for all targets.

4. How hard would it be to generalize this to be able to specify reserving any register, not just the X and (implicitly) W registers, automatically derived from the register info available in lib/Target/AArch64/AArch64RegisterInfo.td?


Repository:
  rL LLVM

https://reviews.llvm.org/D48580