[PATCH] D48580: [AArch64] Support reserving x1-7 registers.

[Stephen Hines via Phabricator via llvm-commits]

srhines added a comment.

In https://reviews.llvm.org/D48580#1144224, @efriedma wrote:

> x1-x7 are argument registers in the calling convention; what's supposed to happen if there's a call in the code?
>
> I can see two possibilities:
>
> 1. We emit an error.
> 2. We change the calling convention so it doesn't use the reserved register.
>
>   Your patch implements neither of these choices; instead, it will just miscompile.


Changing the calling convention seems like it would be potentially surprising, so I would think that emitting an error is the preferred case here. This feature is being used in areas of the Linux kernel already, and is mostly intended for experts to fine-tune their own calling conventions in some performance-sensitive areas.


Repository:
  rL LLVM

https://reviews.llvm.org/D48580