[PATCH] D48580: [AArch64] Support reserving x1-7 registers.

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

x1-x7 are argument registers in the calling convention; what's supposed to happen if there's a call in the code?

I can see two possibilities:

1. We emit an error.
2. We change the calling convention so it doesn't use the reserved register.

Your patch implements neither of these choices; instead, it will just miscompile.


Repository:
  rL LLVM

https://reviews.llvm.org/D48580