[PATCH] D47516: AMDGPU/R600: Make sure functions are cache line aligned

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 30 14:28:06 PDT 2018

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arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.

LGTM


Repository:
  rL LLVM

https://reviews.llvm.org/D47516

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