[PATCH] D47516: AMDGPU/R600: Make sure functions are cache line aligned

Jan Vesely via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 30 21:12:22 PDT 2018


This revision was automatically updated to reflect the committed changes.
Closed by commit rL333622: AMDGPU/R600: Make sure functions are cacheline aligned (authored by jvesely, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D47516?vs=149149&id=149231#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D47516

Files:
  llvm/trunk/lib/Target/AMDGPU/R600AsmPrinter.cpp
  llvm/trunk/test/CodeGen/AMDGPU/r600.func-alignment.ll


Index: llvm/trunk/lib/Target/AMDGPU/R600AsmPrinter.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/R600AsmPrinter.cpp
+++ llvm/trunk/lib/Target/AMDGPU/R600AsmPrinter.cpp
@@ -103,6 +103,10 @@
 
 bool R600AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
 
+
+  // Functions needs to be cacheline (256B) aligned.
+  MF.ensureAlignment(8);
+
   SetupMachineFunction(MF);
 
   MCContext &Context = getObjFileLowering().getContext();
Index: llvm/trunk/test/CodeGen/AMDGPU/r600.func-alignment.ll
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/r600.func-alignment.ll
+++ llvm/trunk/test/CodeGen/AMDGPU/r600.func-alignment.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+; RUN: llc < %s -march=r600 -mcpu=rs880 | FileCheck  %s
+
+; CHECK: .globl test
+; Functions need to be cacheline (256B) aligned to prevent GPU hangs
+; CHECK: .p2align 8
+; CHECK: {{^}}test:
+; CHECK: CF_END
+
+define amdgpu_ps void @test(<4 x float> inreg %reg0) {
+entry:
+  ret void
+}


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D47516.149231.patch
Type: text/x-patch
Size: 1103 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180531/7d38e1b3/attachment.bin>


More information about the llvm-commits mailing list