[PATCH] D47516: AMDGPU/R600: Make sure functions are cache line aligned
Jan Vesely via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 30 11:52:22 PDT 2018
jvesely added inline comments.
================
Comment at: lib/Target/AMDGPU/R600AsmPrinter.cpp:106-109
+
+ // All CF instructions need to be 8 byte aligned. Since functions begin
+ // with a CF instruction, they all need to be 8 by aligned.
+ MF.setAlignment(8);
----------------
arsenm wrote:
> arsenm wrote:
> > Should be ensureAlignment
> I think this is also supposed to be expressed as power of two, not bytes
you might want to check the MADGPUASmrinter as well, that's where I copied this from.
Repository:
rL LLVM
https://reviews.llvm.org/D47516
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