[llvm] r327650 - [X86][Btver2] Attach AES/CLMUL instructions to a scheduler pipe

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Thu Mar 15 10:45:10 2018
New Revision: 327650

URL: http://llvm.org/viewvc/llvm-project?rev=327650&view=rev
Log:
[X86][Btver2] Attach AES/CLMUL instructions to a scheduler pipe

Modified:
    llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td

Modified: llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td?rev=327650&r1=327649&r2=327650&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td Thu Mar 15 10:45:10 2018
@@ -308,9 +308,9 @@ defm : JWriteResFpuPair<WritePCmpEStrM,
 // AES Instructions.
 ////////////////////////////////////////////////////////////////////////////////
 
-defm : JWriteResFpuPair<WriteAESIMC,    [JVIMUL], 2>;
-defm : JWriteResFpuPair<WriteAESKeyGen, [JVIMUL], 2>;
-defm : JWriteResFpuPair<WriteAESDecEnc, [JVIMUL], 3>;
+defm : JWriteResFpuPair<WriteAESIMC,      [JFPU0, JVIMUL], 2>;
+defm : JWriteResFpuPair<WriteAESKeyGen,   [JFPU0, JVIMUL], 2>;
+defm : JWriteResFpuPair<WriteAESDecEnc,   [JFPU0, JVIMUL], 3>;
 
 ////////////////////////////////////////////////////////////////////////////////
 // Horizontal add/sub  instructions.
@@ -335,7 +335,7 @@ def : InstRW<[JWriteFHAddYLd], (instrs V
 // Carry-less multiplication instructions.
 ////////////////////////////////////////////////////////////////////////////////
 
-defm : JWriteResFpuPair<WriteCLMul,     [JVIMUL], 2>;
+defm : JWriteResFpuPair<WriteCLMul,       [JFPU0, JVIMUL], 2>;
 
 ////////////////////////////////////////////////////////////////////////////////
 // SSE4.1 instructions.