[PATCH] D35561: [SelectionDAG] Provide adequate register class for RegisterSDNode
Jan Vesely via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 8 11:14:42 PST 2018
jvesely added a comment.
In https://reviews.llvm.org/D35561#1000382, @smaksimovic wrote:
> Update test/CodeGen/AMDGPU/r600.work-item-intrinsics.ll
the r600 test LGTM
https://reviews.llvm.org/D35561
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