[PATCH] D35561: [SelectionDAG] Provide adequate register class for RegisterSDNode

[Stefan Maksimovic via Phabricator via llvm-commits]

smaksimovic updated this revision to Diff 133193.
smaksimovic added a comment.
Herald added a subscriber: nhaehnle.

Update test/CodeGen/AMDGPU/r600.work-item-intrinsics.ll


https://reviews.llvm.org/D35561

Files:
  lib/CodeGen/SelectionDAG/InstrEmitter.cpp
  test/CodeGen/AMDGPU/r600.work-item-intrinsics.ll
  test/CodeGen/Mips/tailcall/tailcall.ll

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