[PATCH] D35561: [SelectionDAG] Provide adequate register class for RegisterSDNode

Simon Dardis via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 9 01:49:06 PST 2018


sdardis accepted this revision.
sdardis added a comment.
This revision is now accepted and ready to land.

LGTM.



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Comment at: test/CodeGen/AMDGPU/r600.work-item-intrinsics.ll:1
 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
 
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Add -verify-machineinstrs here to ensure we don't regress.


https://reviews.llvm.org/D35561





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