[llvm] r323676 - [MachineVerifier] Add check that renamable operands aren't reserved registers.
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 31 09:15:22 PST 2018
Hi Galina,
Sorry about that. I’ll take a look shortly
--
Geoff Berry
Employee of Qualcomm Datacenter Technologies, Inc.
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
From: Galina Kistanova [mailto:gkistanova at gmail.com]
Sent: Tuesday, January 30, 2018 6:00 PM
To: Geoff Berry <gberry at codeaurora.org>
Cc: Artur Pilipenko via llvm-commits <llvm-commits at lists.llvm.org>
Subject: Re: [llvm] r323676 - [MachineVerifier] Add check that renamable operands aren't reserved registers.
Hello Geoff,
This commit broke the test CodeGen/AArch64/machine-outliner.mir on one of our builders:
r323676
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/7621
. . .
Failing Tests (3):
LLVM :: CodeGen/AArch64/machine-outliner.mir
LLVM :: CodeGen/ARM/pr25838.ll
LLVM :: DebugInfo/X86/string-offsets-multiple-cus.ll
Previous revision:
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/7624
Please have a look?
Thanks
Galina
On Mon, Jan 29, 2018 at 10:57 AM, Geoff Berry via llvm-commits <llvm-commits at lists.llvm.org <mailto:llvm-commits at lists.llvm.org> > wrote:
Author: gberry
Date: Mon Jan 29 10:57:07 2018
New Revision: 323676
URL: http://llvm.org/viewvc/llvm-project?rev=323676 <http://llvm.org/viewvc/llvm-project?rev=323676&view=rev> &view=rev
Log:
[MachineVerifier] Add check that renamable operands aren't reserved registers.
Summary:
Reviewers: qcolombet, MatzeB
Subscribers: arsenm, sdardis, nhaehnle, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D42449
Modified:
llvm/trunk/lib/CodeGen/MachineVerifier.cpp
Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=323676 <http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=323676&r1=323675&r2=323676&view=diff> &r1=323675&r2=323676&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Mon Jan 29 10:57:07 2018
@@ -1101,12 +1101,14 @@ MachineVerifier::visitMachineOperand(con
}
}
}
- if (MO->isRenamable() &&
- ((MO->isDef() && MI->hasExtraDefRegAllocReq()) ||
- (MO->isUse() && MI->hasExtraSrcRegAllocReq()))) {
- report("Illegal isRenamable setting for opcode with extra regalloc "
- "requirements",
- MO, MONum);
+ if (MO->isRenamable()) {
+ if ((MO->isDef() && MI->hasExtraDefRegAllocReq()) ||
+ (MO->isUse() && MI->hasExtraSrcRegAllocReq()))
+ report("Illegal isRenamable setting for opcode with extra regalloc "
+ "requirements",
+ MO, MONum);
+ if (MRI->isReserved(Reg))
+ report("isRenamable set on reserved register", MO, MONum);
return;
}
} else {
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