[llvm] r321089 - [DAG] Elide overlapping store

[Chandler Carruth via llvm-commits]

Someone commented on Phab but not here: this appears to have broken all the
PPC bots. Please revert ASAP to get them back.

On Tue, Dec 19, 2017 at 12:11 PM Nirav Dave via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: niravd
> Date: Tue Dec 19 09:10:56 2017
> New Revision: 321089
>
> URL: http://llvm.org/viewvc/llvm-project?rev=321089&view=rev
> Log:
> [DAG] Elide overlapping store
>
> Summary:
> Extend overlapping store elision to handle overwrites of stores by
> larger stores.
>
> Nontemporal tests have been modified to add memory dependencies to
> prevent store elision.
>
> Reviewers: craig.topper, rnk, t.p.northover
>
> Subscribers: javed.absar, hiraditya, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D40969
>
> Modified:
>     llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>     llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=321089&r1=321088&r2=321089&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Dec 19
> 09:10:56 2017
> @@ -13784,30 +13784,30 @@ SDValue DAGCombiner::visitSTORE(SDNode *
>      }
>    }
>
> -  if (StoreSDNode *ST1 = dyn_cast<StoreSDNode>(Chain)) {
> -    if (ST->isUnindexed() && !ST->isVolatile() && ST1->isUnindexed() &&
> -        !ST1->isVolatile() && ST1->getBasePtr() == Ptr &&
> -        ST->getMemoryVT() == ST1->getMemoryVT()) {
> -      // If this is a store followed by a store with the same value to
> the same
> -      // location, then the store is dead/noop.
> -      if (ST1->getValue() == Value) {
> -        // The store is dead, remove it.
> -        return Chain;
> -      }
> +  // Deal with elidable overlapping chained stores.
> +  if (StoreSDNode *ST1 = dyn_cast<StoreSDNode>(Chain))
> +    if (OptLevel != CodeGenOpt::None && ST1->isUnindexed() &&
> +        !ST1->isVolatile() && ST1->hasOneUse() &&
> +        !ST1->getBasePtr().isUndef() && !ST->isVolatile()) {
> +      BaseIndexOffset STBasePtr =
> BaseIndexOffset::match(ST->getBasePtr(), DAG);
> +      BaseIndexOffset ST1BasePtr =
> +          BaseIndexOffset::match(ST1->getBasePtr(), DAG);
> +      unsigned STBytes = ST->getMemoryVT().getStoreSize();
> +      unsigned ST1Bytes = ST1->getMemoryVT().getStoreSize();
> +      int64_t PtrDiff;
> +      // If this is a store who's preceeding store to a subset of the same
> +      // memory and no one other node is chained to that store we can
> +      // effectively drop the store. Do not remove stores to undef as
> they may
> +      // be used as data sinks.
>
> -      // If this is a store who's preceeding store to the same location
> -      // and no one other node is chained to that store we can effectively
> -      // drop the store. Do not remove stores to undef as they may be
> used as
> -      // data sinks.
> -      if (OptLevel != CodeGenOpt::None && ST1->hasOneUse() &&
> -          !ST1->getBasePtr().isUndef()) {
> -        // ST1 is fully overwritten and can be elided. Combine with it's
> chain
> -        // value.
> +      if (((ST->getBasePtr() == ST1->getBasePtr()) &&
> +           (ST->getValue() == ST1->getValue())) ||
> +          (STBasePtr.equalBaseIndex(ST1BasePtr, DAG, PtrDiff) &&
> +           (0 <= PtrDiff) && (PtrDiff + ST1Bytes <= STBytes))) {
>          CombineTo(ST1, ST1->getChain());
> -        return SDValue();
> +        return SDValue(N, 0);
>        }
>      }
> -  }
>
>    // If this is an FP_ROUND or TRUNC followed by a store, fold this into a
>    // truncating store.  We can do this even if this is already a
> truncstore.
>
> Modified: llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll?rev=321089&r1=321088&r2=321089&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll Tue Dec 19
> 09:10:56 2017
> @@ -10,11 +10,10 @@ declare void @llvm.memset.p0i8.i64(i8* n
>  define i32 @main() local_unnamed_addr #1 {
>  ; Make sure the stores happen in the correct order (the exact
> instructions could change).
>  ; CHECK-LABEL: main:
> -; CHECK: stp xzr, xzr, [sp, #72]
> +; CHECK: str xzr, [sp, #80]
>  ; CHECK: str w9, [sp, #80]
> -; CHECK: str q0, [sp, #48]
> +; CHECK: stp q0, q0, [sp, #48]
>  ; CHECK: ldr w8, [sp, #48]
> -; CHECK: str q0, [sp, #64]
>
>  for.body.lr.ph.i.i.i.i.i.i63:
>    %b1 = alloca [10 x i32], align 16
>
>
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