[PATCH] D37851: [Power9] Add missing Power9 instructions.

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai requested changes to this revision.
nemanjai added inline comments.
This revision now requires changes to proceed.


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Comment at: lib/Target/PowerPC/PPCInstr64Bit.td:687
 
 let Predicates = [IsISA3_0] in {
+def MADDHD : VAForm_1a<48, (outs g8rc :$RT), (ins g8rc:$RA, g8rc:$RB, g8rc:$RC),
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No need for an extra block with the exact same predicate.


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Comment at: lib/Target/PowerPC/PPCInstrFormats.td:399
+  let Inst{6-10}  = RT;
+  let Inst{11-15} = D{5-1};  // d1
+  let Inst{16-25} = D{15-6};   // d0
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Line up the comments on these lines please.


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Comment at: lib/Target/PowerPC/PPCInstrInfo.td:3805
                      "mcrfs $BF, $BFA", IIC_BrMCR>;
+def SETB : XForm_44<31, 128, (outs g8rc:$RT), (ins crrc:$BFA),
+                     "setb $RT, $BFA", IIC_IntGeneral>;
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Do we not want 32-bit and 64-bit variants of these? If so, please stick to the naming convention of `<MNEMONIC>`/`<MNEMONIC>8` and set `Interpretation64Bit` accordingly. If they're 64-bit only, please move them to the right file and have them inherit `isPPC64`.


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Comment at: lib/Target/PowerPC/PPCInstrInfo.td:3807
+                     "setb $RT, $BFA", IIC_IntGeneral>;
+def DARN : XForm_45<31, 755, (outs g8rc:$RT), (ins i32imm :$L),
+                     "darn $RT, $L", IIC_LdStLD>;
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Remove the space between `i32imm` and the colon. Here and for `ADDPCIS`.


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Comment at: test/MC/Disassembler/PowerPC/ppc64-encoding.txt:346
+
+# CHECK: addpcis 3, 22627
+0x4c,0x71,0x58,0x45
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Add one case where we'll emit an `lnia`.


https://reviews.llvm.org/D37851