[PATCH] D37968: [ARM] Fix for indexed dot product instruction descriptions
Sjoerd Meijer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 18 07:19:26 PDT 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL313531: [ARM] Fix for indexed dot product instruction descriptions (authored by SjoerdMeijer).
Changed prior to commit:
https://reviews.llvm.org/D37968?vs=115619&id=115641#toc
Repository:
rL LLVM
https://reviews.llvm.org/D37968
Files:
llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
llvm/trunk/test/MC/ARM/armv8.2a-dotprod-error.s
Index: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
===================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
@@ -4710,7 +4710,7 @@
// Indexed dot product instructions:
class DOTI<string opc, string dt, bit Q, bit U, RegisterClass Ty> :
N3Vnp<0b11100, 0b10, 0b1101, Q, U,
- (outs Ty:$Vd), (ins Ty:$Vn, DPR:$Vm, VectorIndex32:$lane),
+ (outs Ty:$Vd), (ins Ty:$Vn, DPR_VFP2:$Vm, VectorIndex32:$lane),
N3RegFrm, IIC_VDOTPROD, opc, dt, []> {
bit lane;
let Inst{5} = lane;
Index: llvm/trunk/test/MC/ARM/armv8.2a-dotprod-error.s
===================================================================
--- llvm/trunk/test/MC/ARM/armv8.2a-dotprod-error.s
+++ llvm/trunk/test/MC/ARM/armv8.2a-dotprod-error.s
@@ -3,12 +3,34 @@
// RUN: not llvm-mc -triple thumb -mattr=+dotprod -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
+// Only indices 0 an 1 should be accepted:
+
vudot.u8 d0, d1, d2[2]
vsdot.s8 d0, d1, d2[2]
vudot.u8 q0, q1, d4[2]
vsdot.s8 q0, q1, d4[2]
// CHECK-ERROR: error: invalid operand for instruction
+// CHECK-ERROR: vudot.u8 d0, d1, d2[2]
+// CHECK-ERROR: ^
+// CHECK-ERROR: error: invalid operand for instruction
+// CHECK-ERROR: vsdot.s8 d0, d1, d2[2]
+// CHECK-ERROR: ^
+// CHECK-ERROR: error: invalid operand for instruction
+// CHECK-ERROR: vudot.u8 q0, q1, d4[2]
+// CHECK-ERROR: ^
// CHECK-ERROR: error: invalid operand for instruction
+// CHECK-ERROR: vsdot.s8 q0, q1, d4[2]
+// CHECK-ERROR: ^
+
+// Only the lower 16 D-registers should be accepted:
+
+vudot.u8 q0, q1, d16[0]
+vsdot.s8 q0, q1, d16[0]
+
// CHECK-ERROR: error: invalid operand for instruction
+// CHECK-ERROR: vudot.u8 q0, q1, d16[0]
+// CHECK-ERROR: ^
// CHECK-ERROR: error: invalid operand for instruction
+// CHECK-ERROR: vsdot.s8 q0, q1, d16[0]
+// CHECK-ERROR: ^
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