[PATCH] D37065: Ensure standard pseudo instructions (TargetOpcode::*) are compatible with guessInstructionProperties=0

Alex Bradbury via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 25 05:40:34 PDT 2017


asb added a subscriber: tstellar.
asb added inline comments.


================
Comment at: include/llvm/Target/Target.td:915
   let AsmString = "BUNDLE";
+  let hasSideEffects = 1;
 }
----------------
qcolombet wrote:
> Ditto
This leads to changes in test output in several AMDGPU tests as well as ARM/Windows/tls.ll. After setting hasSideEffects to 0, MachineInstr::hasUnmodeledSideEffects will return true for a bundle only if that property holds for one of its member instructions. From a cursory look, the changed code didn't appear to be broken. I'll rustle up a patch that sets hasSideEffects=0 on bundle, but @tstellar please do chime in if you have any concerns about BUNDLE having hasSideEffects=0. 


https://reviews.llvm.org/D37065





More information about the llvm-commits mailing list