[PATCH] D37065: Ensure standard pseudo instructions (TargetOpcode::*) are compatible with guessInstructionProperties=0

[Tom Stellard via Phabricator via llvm-commits]

tstellar added inline comments.


================
Comment at: include/llvm/Target/Target.td:915
   let AsmString = "BUNDLE";
+  let hasSideEffects = 1;
 }
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asb wrote:
> qcolombet wrote:
> > Ditto
> This leads to changes in test output in several AMDGPU tests as well as ARM/Windows/tls.ll. After setting hasSideEffects to 0, MachineInstr::hasUnmodeledSideEffects will return true for a bundle only if that property holds for one of its member instructions. From a cursory look, the changed code didn't appear to be broken. I'll rustle up a patch that sets hasSideEffects=0 on bundle, but @tstellar please do chime in if you have any concerns about BUNDLE having hasSideEffects=0. 
This doesn't seem like it should be an issue, but I'd have to see what the test changes look like.


https://reviews.llvm.org/D37065