[PATCH] D34143: Handling of TRAP during isel

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa created this revision.
Herald added subscribers: kristof.beyls, arichardson, javed.absar, aemerson, jholewinski.

The one thing that keeps the SystemZ backend from enabling expensive checks, is the issue with the trap instruction. See https://bugs.llvm.org/show_bug.cgi?id=33047.

Current discussion is:

- It looks like targets are split over whether they consider their "trap" a terminator; x86, AArch64, and NVPTX don't, but ARM, MIPS, PPC, and SystemZ do.  We should probably try to be consistent here.

- If the isTerminator is flag is used, how should isel handle instructions after it? Note that this is only an issue at -O0.

I did a quick experiment to see what would happen if I just added isTerminator on all targets trap instructions, and then handled TRAP during selection DAG building. **This however caused a lot of regression test failures, so this is not a working patch right now.**


https://reviews.llvm.org/D34143

Files:
  lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  lib/Target/AArch64/AArch64InstrInfo.td
  lib/Target/Mips/Mips16InstrInfo.td
  lib/Target/Mips/MipsInstrInfo.td
  lib/Target/NVPTX/NVPTXInstrInfo.td
  lib/Target/SystemZ/SystemZInstrInfo.td
  lib/Target/X86/X86InstrSystem.td
  lib/Target/XCore/XCoreInstrInfo.td

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