[PATCH] D30021: [LSR] Prevent formula with SCEVAddRecExpr type of Reg from Sibling loops
Chandler Carruth via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 15 21:35:00 PST 2017
chandlerc accepted this revision.
chandlerc added a comment.
This revision is now accepted and ready to land.
LGTM, this seems to be an obvious fix to the bug, and exactly matches the intent from the original patch.
Repository:
rL LLVM
https://reviews.llvm.org/D30021
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