[PATCH] D30021: [LSR] Prevent formula with SCEVAddRecExpr type of Reg from Sibling loops

Wei Mi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 15 18:44:50 PST 2017


wmi created this revision.
Herald added a subscriber: mzolotukhin.

 In rL294814, we allow formula with SCEVAddRecExpr type of Reg from loops other than current loop. This is good for the case when induction variable of outerloop being used in expr in innerloop. But it is very bad to allow such Reg from sibling loop because we may need to add lsr.iv in other sibling loops when scev expanding those SCEVAddRecExpr type exprs. For the testcase below, one loop can be inserted with a bunch of lsr.iv because of LSR for other loops. 

// The induction variable j from a loop in the middle will have initial value generated 
// from previous sibling loop and exit value used by its next sibling loop.
void goo(long i, long j);
long cond;

void foo(long N) {
  long i = 0;
  long j = 0;
  i = 0; do { goo(i, j); i++; j++; } while (cond);
  i = 0; do { goo(i, j); i++; j++; } while (cond);
  i = 0; do { goo(i, j); i++; j++; } while (cond);
  i = 0; do { goo(i, j); i++; j++; } while (cond);
  i = 0; do { goo(i, j); i++; j++; } while (cond);
  i = 0; do { goo(i, j); i++; j++; } while (cond);
}

The fix is to only allow formula with SCEVAddRecExpr type of Reg from current loop or its parents. 


Repository:
  rL LLVM

https://reviews.llvm.org/D30021

Files:
  lib/Transforms/Scalar/LoopStrengthReduce.cpp
  test/Transforms/LoopStrengthReduce/X86/sibling-loops.ll

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