[PATCH] D26648: Clarify semantic of reserved registers.

Quentin Colombet via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 15 16:06:14 PST 2016


qcolombet added inline comments.


================
Comment at: include/llvm/Target/TargetRegisterInfo.h:950
+  /// of the set as well.
+  void assertAllSuperRegsMarked(const BitVector &RegisterSet) const;
 };
----------------
We miss a return here or change the comment.


================
Comment at: include/llvm/Target/TargetRegisterInfo.h:950
+  /// of the set as well.
+  void assertAllSuperRegsMarked(const BitVector &RegisterSet) const;
 };
----------------
qcolombet wrote:
> We miss a return here or change the comment.
What about cases where we have mixed uses:
- Reserved as name; only the tagged name must be reserved (e.g., x86, mips, like you told me about)
- Reserved by ABI; all the super reg must be marked as reserved

This API does not all to check that.


Repository:
  rL LLVM

https://reviews.llvm.org/D26648





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