[PATCH] D26648: Clarify semantic of reserved registers.
Matthias Braun via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 15 12:31:04 PST 2016
MatzeB marked 2 inline comments as done.
MatzeB added inline comments.
================
Comment at: lib/CodeGen/TargetRegisterInfo.cpp:43-47
+void TargetRegisterInfo::markSuperRegs(BitVector &RegisterSet, unsigned Reg)
+ const {
+ for (MCSuperRegIterator AI(Reg, this, true); AI.isValid(); ++AI)
+ RegisterSet.set(*AI);
+}
----------------
arsenm wrote:
> This is almost the same as SIRegisterInfo::reserveRegisterTuples, except that uses MCRegAliasIterator. Is there any real difference?
Given that there are no arbitrary alias definitions in your target (I see no Aliases = in your tablegen files) it has the same effect as long as you only apply it to lowest level registers and not to a tuple.
Repository:
rL LLVM
https://reviews.llvm.org/D26648
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