[PATCH] D26094: Handle non-~0 lane masks on live-in registers in LivePhysRegs
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 28 12:17:36 PDT 2016
kparzysz created this revision.
kparzysz added a reviewer: MatzeB.
kparzysz added a subscriber: llvm-commits.
kparzysz set the repository for this revision to rL LLVM.
When LivePhysRegs adds live-in registers, it recognizes ~0 as a special lane mask indicating the entire register. If the lane mask is not ~0, it will only add the subregisters that overlap the specified lane mask. The problem is that if a live-in register does not have subregisters, and the lane mask is not ~0, it will not be added to the live set. (The given lane mask may simply be the lane mask of its register class.)
If a register does not have subregisters, add it to the live set if the lane mask is non-zero.
Repository:
rL LLVM
https://reviews.llvm.org/D26094
Files:
lib/CodeGen/LivePhysRegs.cpp
test/CodeGen/Hexagon/livephysregs-lane-masks2.mir
Index: test/CodeGen/Hexagon/livephysregs-lane-masks2.mir
===================================================================
--- /dev/null
+++ test/CodeGen/Hexagon/livephysregs-lane-masks2.mir
@@ -0,0 +1,55 @@
+# RUN: llc -march=hexagon -verify-machineinstrs -run-pass branch-folder -o - %s | FileCheck %s
+
+# CHECK-LABEL: name: fred
+
+--- |
+ define void @fred() { ret void }
+
+...
+---
+
+name: fred
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: %p2, %r0
+ successors: %bb.1, %bb.2
+ J2_jumpt killed %p2, %bb.1, implicit-def %pc
+ J2_jump %bb.2, implicit-def %pc
+
+ bb.1:
+ liveins: %r0, %r19
+ successors: %bb.3
+ %r2 = A2_tfrsi 4
+ %r1 = COPY %r19
+ %r0 = S2_asl_r_r killed %r0, killed %r2
+ %r0 = A2_asrh killed %r0
+ J2_jump %bb.3, implicit-def %pc
+
+ bb.2:
+ liveins: %r0, %r18
+ successors: %bb.3
+ %r2 = A2_tfrsi 5
+ %r1 = L2_loadrh_io %r18, 0
+ %r0 = S2_asl_r_r killed %r0, killed %r2
+ %r0 = A2_asrh killed %r0
+
+ bb.3:
+ ; A live-in register without subregs, but with a lane mask that is not ~0
+ ; is not recognized by LivePhysRegs. Branch folding exposes this problem
+ ; (through tail merging).
+ ;
+ ; CHECK: bb.3:
+ ; CHECK: liveins:{{.*}}%p0
+ ; CHECK: %r0 = S2_asl_r_r killed %r0, killed %r2
+ ; CHECK: %r0 = A2_asrh killed %r0
+ ; CHECK: %r0 = C2_cmoveit killed %p0, 1
+ ; CHECK: J2_jumpr %r31, implicit-def %pc, implicit %r0
+ ;
+ liveins: %p0:0x1
+ %r0 = C2_cmoveit killed %p0, 1
+ J2_jumpr %r31, implicit-def %pc, implicit %r0
+...
+
+
Index: lib/CodeGen/LivePhysRegs.cpp
===================================================================
--- lib/CodeGen/LivePhysRegs.cpp
+++ lib/CodeGen/LivePhysRegs.cpp
@@ -143,13 +143,16 @@
/// Add live-in registers of basic block \p MBB to \p LiveRegs.
void LivePhysRegs::addBlockLiveIns(const MachineBasicBlock &MBB) {
for (const auto &LI : MBB.liveins()) {
- if (LI.LaneMask == ~0u) {
+ MCSubRegIndexIterator S(LI.PhysReg, TRI);
+ if (LI.LaneMask == ~0u || (LI.LaneMask != 0 && !S.isValid())) {
addReg(LI.PhysReg);
continue;
}
- for (MCSubRegIndexIterator S(LI.PhysReg, TRI); S.isValid(); ++S)
+ while (S.isValid()) {
if (LI.LaneMask & TRI->getSubRegIndexLaneMask(S.getSubRegIndex()))
addReg(S.getSubReg());
+ ++S;
+ }
}
}
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