[llvm] r284089 - [AArch64][MachineLegalizer] Mark more G_BITCAST as legal.

[Quentin Colombet via llvm-commits]

Author: qcolombet
Date: Wed Oct 12 19:12:01 2016
New Revision: 284089

URL: http://llvm.org/viewvc/llvm-project?rev=284089&view=rev
Log:
[AArch64][MachineLegalizer] Mark more G_BITCAST as legal.

Basically any vector types that fits in a 32-bit register is also valid
as far as copies are concerned.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir

Modified: llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp?rev=284089&r1=284088&r2=284089&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp Wed Oct 12 19:12:01 2016
@@ -181,14 +181,21 @@ AArch64MachineLegalizer::AArch64MachineL
     setAction({G_BITCAST, 1, Ty}, Legal);
   }
 
+  // For the sake of copying bits around, the type does not really
+  // matter as long as it fits a register.
   for (int EltSize = 8; EltSize <= 64; EltSize *= 2) {
     setAction({G_BITCAST, 0, LLT::vector(128/EltSize, EltSize)}, Legal);
     setAction({G_BITCAST, 1, LLT::vector(128/EltSize, EltSize)}, Legal);
-    if (EltSize == 64)
+    if (EltSize >= 64)
       continue;
 
     setAction({G_BITCAST, 0, LLT::vector(64/EltSize, EltSize)}, Legal);
     setAction({G_BITCAST, 1, LLT::vector(64/EltSize, EltSize)}, Legal);
+    if (EltSize >= 32)
+      continue;
+
+    setAction({G_BITCAST, 0, LLT::vector(32/EltSize, EltSize)}, Legal);
+    setAction({G_BITCAST, 1, LLT::vector(32/EltSize, EltSize)}, Legal);
   }
 
   computeTables();

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir?rev=284089&r1=284088&r2=284089&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir Wed Oct 12 19:12:01 2016
@@ -48,6 +48,7 @@ registers:
   - { id: 31, class: _ }
   - { id: 32, class: _ }
   - { id: 33, class: _ }
+  - { id: 34, class: _ }
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
@@ -127,4 +128,6 @@ body: |
     %30(<2 x s32>) = G_BITCAST %9
     %31(s64) = G_BITCAST %30
     %32(s32) = G_BITCAST %15
+    %33(<4 x s8>) = G_BITCAST %15
+    %34(<2 x s16>) = G_BITCAST %15
 ...